High mobility n and p channels on gallium arsenide and silicon substrates using interfacial misfit dislocation arrays

For technology scaling issues, the use of high-K as dielectric has been adopted as device-level solution. The use of graphene in transistor structure is being evaluated. The previous chapter focused on these aspects. This chapter also discusses a material level solution of technology scaling and focuses on the use of compound semiconductor with Si to solve the challenges of technology scaling.