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Integrated substrate technology

  • Rajen Chanchani
  • , Donald T. Bethke
  • , Denise B. Webb
  • , Charlie Sandoval
  • , Gregg Wouters

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Scopus citations

Abstract

Advanced micro-systems for national security needs will require miniaturization and integration of RF, digital and analog electronics, optics and MEMS on a single substrate. To meets these demands we have developed an integrated substrate technology using Benzocyclobutene (BCB)/copper (Cu) with embedded thin film passive components. We have developed processes to fabricate BCB/Cu multi-layer stack on silicon (Si), alumina (Al2O3) and Low Temperature Co-fired Ceramic (LTCC) wafers. A multi-layer stack of 6 metal layers and 5 BCB layers using 5-micron and 10-micron thick photodefinable BCB dielectric and 2 to 3-micron thick Cu conductor have been demonstrated. The design rules for minimum featured size used were 30-micron vias on 50-micron pitch and 25-micron wide lines on 40-micron pitch. We have also fabricated embedded inductors, in-plane and in 3-dimension, ranging in values from 750 pH to 42 nH, embedded TaN thin-film resistors with DC values ranging from 10 Ohms to 10 KOhms and embedded capacitors ranging in values from 48 pF to 110 nF measured at 1 MHz and 100 MHz. We have designed, fabricated, characterized and simulated micro-strip lines in a RF module. The transmission losses range from 0.021 to 0.114 dB/mm. The return losses are 25.5 dB to 41 dB and VSWR range from 1.018 to 1.111. We are currently developing the next generation of miniaturized circuits called Integrated System-On-A-Chip. In this technology, Integrated Substrate Technology will be used to stack wafers in 3-D and to make electrical connections through the stacked wafers.
Original languageEnglish
Title of host publicationProceedings - Electronic Components and Technology Conference
Pages1232-1236
Number of pages5
Volume2
StatePublished - Dec 27 2004
Externally publishedYes

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